general description the max2742 complete single-chip global positioning system (gps) rf front-end utilizes many innovative and leading-edge rf cmos design techniques. this high- performance, state-of-the-art device consumes extreme- ly low power and eliminates the need for costly saw and bulky discrete if filters. the max2742 incorporates a fully integrated low-noise amplifier (lna) and mixer, if section, digital sampler, and local oscillator synthesizer. the intended input signal for the max2742 is the l1 gps signal 1.57542ghz. this device supports high- accuracy output quantization, which delivers the best performance obtainable for the gps receiver. the power consumption of the max2742 is as low as 32mw at a +2.4v supply. the max2742 is available in a space-saving 48-pin tqfp package and is specified for the extended (-40? to +85?) temperature range. applications in-vehicle navigation systems (ivns) location-based services (pdas and accessories) recreational handheld/walkie talkies geographical information systems (giss) telematics (vehicle, asset tracking, and inventory management) emergency roadside assistance emergency response systems digital cameras/camcorders consumer electronics features ? complete single-chip gps front-end receiver ? single-ended or differential outputs at 1.023mhz ? low 4.5db typical noise figure ? no external if saw or discrete filters required ? very low 32mw power consumption at +2.4v ? wide +2.4v to +3.6v operational supply voltage range ? extended -40? to +85? temperature range max2742 single-chip global positioning system receiver front-end ________________________________________________________________ maxim integrated products 1 ordering information 19-3469; rev 1; 3/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. * ep = exposed paddle. + denotes lead-free package. evaluation kit available part temp range pin-package max2742ecm -40? to +85? 48 tqfp-ep* max2742ecm+ -40? to +85? 48 tqfp-ep* i.c. i.c. i.c. i.c. v dd din gnd clkout2 dout i.c. clkout1 v dd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 tcxo buffer pfd div cp bias control block comp lna agc max2742 vga rbias cbias v dd v dd gnd gnd rfin gnd gnd ifsel i.c. v dd gnd dclk clkenb2 clkenb1 v dd agcflt out- out+ i.c. i.c. v dd gnd xtalin2 xtalin1 v dd gnd v dd cpout gnd vtune i.c. v dd gnd shdn block diagram/ pin configuration
max2742 single-chip global positioning system receiver front-end 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics (max2742 ev kit, v dd = +2.4v to +3.6v, shdn = v dd , t a = -40? to +85?. typical values are at v dd = +3v and t a = +25?, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ...........................................................-0.3v to +3.7v all other pins to gnd.................................-0.3v to (v dd + 0.3v) rf lna input power .......................................................+10dbm continuous power dissipation (t a = +70?) 48-pin tqfp-ep (derate 12.5mw/? above +70?) ....100mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? soldering temperature (10s) ...........................................+300? parameter conditions min typ max units supply voltage 2.4 3.6 v v dd = +3.0v, t a = +25 c (note 1) 14 20 ma supply current shutdown mode 10 ? logic-input high voltage v dd - 0.5 v logic-input low voltage 0.5 v logic-input bias current -40 +40 ? ac electrical characteristics (max2742 ev kit, v dd = +2.4v to +3.6v, shdn = v dd , t a = -40 c to +85 c. typical values are at v dd = +3v and t a = +25 c, unless otherwise noted.) parameter conditions min typ max units general performance maximum conversion gain (notes 2, 3) 102 117 db input frequency 1575.42 mhz noise figure measured at quantizer input 4.5 db return loss (s11) -15 db lna/mixer input ip3 f 1 = 1.5mhz and f 2 = 2.0mhz above carrier frequency -32 dbm output if frequency 1.023 mhz output stage differential (vout+, vout-), c l < 20pf 25 output rise/fall time single ended (dout), c l < 20pf 5 ns differential v dd - 0.9 output-voltage-level low single ended 0 v differential output-voltage-level high single ended v dd v caution! esd sensitive device
max2742 single-chip global positioning system receiver front-end _______________________________________________________________________________________ 3 ac electrical characteristics (continued) (max2742 ev kit, v dd = +2.4v to +3.6v, shdn = v dd , t a = -40 c to +85 c. typical values are at v dd = +3v and t a = +25 c, unless otherwise noted.) parameter conditions min typ max units synthesizer tcxo input frequency fundamental frequency crystal 18.414 mhz charge-pump current 0.4 ma f offset = 10khz offset, bw loop = 70khz -71 phase noise f offset = 1mhz offset, bw loop = 70khz -106 dbc/hz comparison frequency spur bw loop = 70khz -66 dbc vco turning range (notes 2, 3) 148 210 277 mhz vco tuning gain (notes 2, 3) 139 200 305 mhz/v if stage if stage gain vga set at maximum gain 77 db dynamic range if stage gain 50 db low-frequency corner 0.1 bandpass filter 1db corner frequency high-frequency corner 3.2 mhz bandpass filter 60db high-side rejection 5.0 mhz image rejection 18 db in-band ripple 1db agc loop lock time 1ms note 1: at t a = +25?, min/max limits are guaranteed by production test. note 2: at t a = -40?, min/max limits are guaranteed by design and characterization. note 3: at t a = +25? and +85?, min/max limits are guaranteed by production test.
max2742 single-chip global positioning system receiver front-end 4 _______________________________________________________________________________________ typical operating characteristics (max2742 ev kit, v dd = +3v, and t a = +25?, unless otherwise noted.) supply current vs. temperature max2742 toc01 temperature ( c) supply current (ma) 60 40 20 0 -20 12 13 14 16 10 -40 80 15 11 v cc = +2.7v v cc = +3.0v v cc = +2.4v lna/mixer gain vs. temperature max2742 toc02 temperature ( c) lna-mixer gain (db) 21 22 23 24 25 26 27 28 29 30 20 v cc = +2.4v v cc = +2.7v v cc = +3.0v 60 40 20 0 -20 -40 80 maximum if stage gain vs. temperature max2742 toc03 temperature ( c) vga gain (db) 76 77 78 79 80 75 v cc = +3.0v v cc = +2.7v v cc = +2.4v 60 40 20 0 -20 -40 80 total conversion gain vs. temperature max2742 toc04 temperature ( c) system gain (db) 102 103 104 105 100 101 60 40 20 0 -20 -40 80 v cc = +3.0v v cc = +2.7v v cc = +2.4v
max2742 single-chip global positioning system receiver front-end _______________________________________________________________________________________ 5 pin description pin name function 1 rbias external bias resistor. connect a 100k ? 1% resistor in parallel with a 0.1? capacitor in series with a 71k ? resistor to gnd. 2 cbias external bias capacitor. connect a 0.1? capacitor to gnd. 3, 4, 12, 17, 23, 25, 32, 39, 44, 46 v dd supply voltage. bypass to gnd with a capacitor as close to the pin as possible. 5, 6, 8, 9, 13, 24, 30, 38, 42, 45 gnd ground. connect to pc board ground plane. 7 rfin lna input. requires external matching network. 10 ifsel if output select. selects output type. drive high for single-ended output, drive low for differential output. 11, 21, 22, 27, 33?6, 40 i.c. internally connected. leave unconnected. 14 dclk digital control clock 15 clkenb2 clock output enable 2. drive high to enable limited-swing clock output. 16 clkenb1 clock output enable 1. drive high to enable full-swing clock output. 18 agcflt agc external filter 19, 20 out-, out+ differential comparator outputs 26 clkout1 full-swing clock output 28 dout digital output 29 clkout2 limited-swing clock output 31 din digital-control data input 37 shdn shutdown. drive shdn high to disable all device functions. drive shdn low for normal operation. 41 vtune vco tuning input 43 cpout charge-pump output. connect directly to loop filter. 47, 48 xtalin1, xtalin2 connect xtalin1 and xtalin2 together and to the tcxo output through a coupling capacitor. ep gnd exposed paddle. connect to pc board ground plane for optimal performance.
max2742 single-chip global positioning system receiver front-end 6 _______________________________________________________________________________________ detailed description lna/mixer the rf input from the gps antenna is fed through an lna with a 24db gain. the amplified signal is then fed to a mixer that downconverts the signal (1575.42mhz) to a quadrature differential if of 1.023mhz. if stage the quadrature if signals pass through the if filter, which rejects the out-of-band spurs by more than 60db and the image noise by 18db (typ). after the image reject filter, the signal is converted from quadrature to differential. the filtered if signal is then amplified by the agc block, which sets the vga output signal level to a predetermined value through the application using 50db of dynamic range. the internal offset-cancellation mech- anism generates a highpass characteristic for the if section with a 1db corner frequency of about 100khz. if output selection the sampled outputs of the gps signal are available in a single-ended or differential format. the ifsel pin controls the output format. synthesizer an on-chip vco provides quadrature differential lo signals to the downconverting mixer and controls the frequency. an on-board tcxo generates the reference frequency. the integrated synthesizer includes the vco, tcxo buffer, main frequency divider, phase-fre- quency detector, and charge pump. it uses an off-chip pll loop filter and tcxo. connect the output of the tcxo to xtalin1 and xtalin2 through a coupling capacitor. the main division ratio for the synthesizer is 684. with this division ratio, a low-side injection lo can be synthesized with an 18.414mhz txco. applications information layout issues a properly designed pc board is an essential part of any rf/microwave circuit. on all high-frequency inputs and outputs, use controlled impedance lines and keep them as short as possible to minimize losses and radiation. keeping the traces short also reduces parasitic induc- tance. to further reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces. also, place decoupling capacitors as close to the supply pins as possible. for proper power dissipation and operation, connect the metal exposed paddle solidly to the ground plane of the pc board.
max2742 single-chip global positioning system receiver front-end _______________________________________________________________________________________ 7 typical application circuit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 tcxo buffer pfd div cp bias control block comp lna agc max2742 vga xtalin2 xtalin1 v dd gnd v dd cpout gnd vtune i.c. v dd gnd shdn i.c. i.c. i.c. i.c. v dd din gnd clkout2 dout i.c. clkout1 v dd gnd dclk clkenb2 clkenb1 v dd agcflt out- out+ i.c. i.c. v dd gnd rbias cbias v dd v dd gnd gnd rfin gnd gnd ifsel i.c. v dd tcxo chip information process: cmos transistor count: 18443
max2742 single-chip global positioning system receiver front-end maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 48l,tqfp.eps g 1 2 21-0065 package outline, 48l tqfp, 7x7x1.0mm ep option g 2 2 21-0065 package outline, 48l tqfp, 7x7x1.0mm ep option
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max2742 part number table notes: see the max2742 quickview data sheet for further information on this product family or download the max2742 full data sheet (pdf, 168kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max2742ec m+td -40c to +85c rohs/lead-free: yes max2742evkit rohs/lead-free: no max2742ec m+d tqfp;48 pin;7x7x1 mm dwg: 21-0065g (pdf) use pkgcode/variation: c 48e+8 * -40c to +85c rohs/lead-free: yes materials analysis max2742ec m-c 0a tqfp;48 pin;7x7x1 mm dwg: 21-0065g (pdf) use pkgcode/variation: c 48e-8 * -40c to +85c rohs/lead-free: no materials analysis didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y
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